Nonvolatile semiconductor memory device and method of manufactur

Details Nonvolatile semiconductor memory device and method of manufactur Nonvolatile semiconductor memory device and method of manufactur

1997-09-05

2000-04-11

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438257, 438276, 438286, H01L 21336, H01L 218236

Patent

active

060487704

ABSTRACT:
Under an N.sup.- -drain region covering an N.sup.+ -drain region, a P.sup.+ -impurity region is formed without covering an end of the N.sup.- -drain region near a channel region. Thereby, the P.sup.+ -impurity region suppresses a punch-through phenomenon, while the N.sup.- -drain region prevents a leak current due to interband tunneling.

REFERENCES:
patent: 4868619 (1989-09-01), Mukherjee et al.
patent: 4939558 (1990-07-01), Smayling et al.
patent: 5422506 (1995-06-01), Zamanian
patent: 5548143 (1996-08-01), Lee
Wolf, S.; Silicon Processing for the VLSI Era, vol. 1; Lattice Press, Sunset Beach, Ca.; pp. 325-330, 1986.

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