Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1995-12-11
1997-08-19
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438588, 438981, 438453, H01L 218247
Patent
active
056588127
ABSTRACT:
The present invention aims to prevent the thickness of the element separation insulating film of the high voltage withstanding area from being thinned and reliability of the memory cell from being reduced. Element separation insulating films are formed on a surface of a silicon substrate. A silicon oxide film, serving as a gate insulating film of a high voltage withstanding area, is formed on the surface of the silicon substrate. A first polycrystalline silicon film is deposited on the oxide film and the element separation insulating films, and a first resist pattern is formed on the polycrystalline silicon film of the high voltage withstanding area and the low voltage withstanding area. The resist pattern is used as a mask to etch the polycrystalline silicon film. After separating the resist pattern, the silicon oxide film of the cell area is removed, and an oxide-nitride film, serving as a gate insulating film of the cell area is formed on the surface of the silicon substrate of the cell area. Therefore, it is possible to prevent the thickness of the element separation insulating film of high voltage withstanding area from being thinned and prevent reliability of the memory cell from being reduced.
REFERENCES:
patent: 4651406 (1987-03-01), Shimizu et al.
patent: 5254489 (1993-10-01), Nakata
patent: 5532181 (1996-07-01), Takebuchi et al.
Chaudhari Chandra
Kabushiki Kaisha Toshiba
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