Nonvolatile semiconductor memory device

Details Nonvolatile semiconductor memory device Nonvolatile semiconductor memory device

1987-05-11

1989-02-14

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365218, G11C 700

Patent

active

048051519

ABSTRACT:
In an EEPROM capable of writing data in a page mode, an output portion of a Y decoder is provided with a column latch circuit for storing a Y gate line selected by a Y decoder at the time of writing data. The column latch circuit activates the Y gate line selected in response to the stored information at the cycle of verifying erasing and connects a memory cell connected to the Y gate line to a data output line. Thus, it can be determined whether the erased memory cell was surely erased or not in a page mode.

REFERENCES:
IEEE Journal of Solid-State Circuits, "An Enhanced 16K E.sup.2 PROM", by Lubin Gee et al, vol. SC-17, No. 5, Oct. 1982.

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