Static information storage and retrieval – Read/write circuit – Plural use of terminal
Reexamination Certificate
2007-10-12
2008-10-21
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Plural use of terminal
C365S185050, C365S185010
Reexamination Certificate
active
07440337
ABSTRACT:
A memory card (1) includes an electrically rewritable non-volatile memory (4), a data processor (3) having a function of executing instructions, and managing the allocation of file data in the non-volatile memory, an interface control circuit (2) having a function of establishing an external interface, for controlling the execution of instructions by the data processor in response to external commands and for controlling access to the non-volatile memory and a buffer memory (7) for temporarily storing the file data. The interface control circuit includes command control means for decoding a first command externally supplied and for instructing the data processor to fetch an instruction from the buffer memory and to operate.
REFERENCES:
patent: 4126896 (1978-11-01), Yamazaki
patent: 4504915 (1985-03-01), Daniels et al.
patent: 4760518 (1988-07-01), Potash et al.
patent: 5138619 (1992-08-01), Fasang et al.
patent: RE34445 (1993-11-01), Hayes et al.
patent: 5291603 (1994-03-01), Morse et al.
patent: 5473573 (1995-12-01), Rao
patent: 5535165 (1996-07-01), Davis et al.
patent: 5584044 (1996-12-01), Gouhara et al.
patent: 5598368 (1997-01-01), Takahashi et al.
patent: 5606660 (1997-02-01), Estakhri et al.
patent: 5704058 (1997-12-01), Derrick et al.
patent: 5802551 (1998-09-01), Komatsu et al.
patent: 5887187 (1999-03-01), Rostoker et al.
patent: 6000048 (1999-12-01), Krishna et al.
patent: 6272042 (2001-08-01), Kato et al.
patent: 6285597 (2001-09-01), Kawahara et al.
patent: 6438029 (2002-08-01), Hiraki et al.
patent: 6459621 (2002-10-01), Kawahara et al.
patent: 6567319 (2003-05-01), Sato et al.
patent: 6603680 (2003-08-01), Kanamitsu et al.
patent: 6643193 (2003-11-01), Yamaki et al.
patent: 6643725 (2003-11-01), Kozakai et al.
patent: 6661712 (2003-12-01), Hiraki et al.
patent: 6992936 (2006-01-01), Tsujikawa et al.
patent: 7295476 (2007-11-01), Matsubara et al.
patent: 63-311436 (1988-12-01), None
patent: 2-64756 (1990-03-01), None
patent: 3-265030 (1991-11-01), None
patent: 11-265283 (1999-09-01), None
Nikkei Electronics, Apr. 11, 1994, date is unknown.
Mano et al, Computer System Architecture, 1982, Prentice-Hall, Inc., 2ndEd., pp. 159-161, 262-263, 434-443.
Webopedia's definition on the vector, http://www.webopedia.com/term/v/vector.html, date is unknown.
Webopedia's definition on the EEPROM, http://www.webopedia.com/term/E/EEPROM.html (Date is unknown).
Furusawa Kazunori
Jono Yuusuke
Kanamori Motoki
Kozakai Kenji
Shikata Atsushi
Mattingly ,Stanger ,Malur & Brundidge, P.C.
Nguyen Tuan T.
Renesas Technology Corp.
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