Nonvolatile memory devices having bit line discharge control...

Details Nonvolatile memory devices having bit line discharge control... Nonvolatile memory devices having bit line discharge control...

2008-11-26

2011-10-18

Le, Vu (Department: 2824)

Static information storage and retrieval

Systems using particular element

Amorphous

C365S148000

Reexamination Certificate

active

08040719

ABSTRACT:
A memory device includes a memory array having a plurality of rows and columns of nonvolatile memory cells (e.g., PRAM cells) therein and a first plurality of local bit lines electrically coupled to a corresponding first plurality of columns of memory cells in the memory array. A first plurality of bit line selection circuits are also provided, which are responsive to bit line selection signals. A first plurality of bit line discharge circuits are electrically connected to respective ones of the first plurality of local bit lines. A bit line discharge control circuit is provided to drive the first plurality of bit line discharge circuits with equivalent bit line discharge signals during an operation to read data from a selected one of the first plurality of local bit lines.

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