Nonvolatile memory device utilizing a vertical nanotube

Details Nonvolatile memory device utilizing a vertical nanotube Nonvolatile memory device utilizing a vertical nanotube

2005-08-16

2005-08-16

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S077000, C257S296000, C257SE51040

Reexamination Certificate

active

06930343

ABSTRACT:
A nonvolatile memory device includes a substrate having a source region; a nanotube array including a plurality of nanotube columns that are vertically grown on the substrate such that a first end of the nanotube array is in contact with the source region, the nanotube array functioning as an electron transport channel; a memory cell formed around an outer side surface of the nanotube array; a control gate formed around an outer side surface of the memory cell; and a drain region in contact with a second end of the nanotube array and the memory cell, wherein the second end of the nanotube array is distal to the first end of the nanotube array.

REFERENCES:
patent: 6313503 (2001-11-01), Lee et al.
patent: 6515325 (2003-02-01), Farnworth et al.
patent: WO 00/48195 (2000-08-01), None

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