Nonvolatile memory device for storing multi-bit data

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Reexamination Certificate

active

07462529

ABSTRACT:
A semiconductor nonvolatile memory device for storing multi-bit data has a memory cell having a source region S and a drain region D formed at the surface of a semiconductor substrate, a gate insulator film and a control gate CG formed on a channel region CH between the source region S and the drain region D and a nonconductive trap gate in the gate insulator film. An indentation is provided at the surface of the semiconductor substrate covering a region from a position in the vicinity of the drain region in the channel region to the drain region. By providing the indentation on the drain region side of the channel region, the trap gate is positioned in the direction of a channel current flowing from the source region S to the drain region D. Then, a charge having run through the channel region CH is injected efficiently into the trap gate on the indentation.

REFERENCES:
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patent: 6121655 (2000-09-01), Odanaka et al.
patent: 6982456 (2006-01-01), Sugiyama et al.
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patent: 08-172199 (1996-07-01), None
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patent: 11-238815 (1999-08-01), None
Y. Hayashi et al., “Twin MONOS Cell with Dual Control Gates”, 2000 IEEE, 2000 Symposium on VLSI Technology Digest of Technical Papers, pp. 122-123.

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