Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-04-20
2008-03-04
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S266000, C257SE21429
Reexamination Certificate
active
07338861
ABSTRACT:
A nonvolatile memory device is provided which includes a floating gate having a lower portion formed in a trench defined in a surface of a substrate and an upper portion protruding above the surface of the substrate from the lower portion. A gate insulating layer is formed along an inner wall of the trench and interposed between the trench and the lower portion of the floating gate. A source region is formed in the substrate adjacent a first sidewall of the trench. A control gate having a first portion is formed over the surface of the substrate adjacent a second sidewall of the trench, and a second portion is formed over the upper portion of the floating gate and extending from the first portion. The first sidewall of the trench is opposite the second sidewall of the trench. An inter-gate insulating layer is formed on the upper portion of floating gate and interposed between the floating gate and the control gate, and a drain region is formed in the surface of the substrate adjacent the control gate and spaced from the second sidewall of the trench.
REFERENCES:
patent: 5488244 (1996-01-01), Qyek et al.
patent: 5990515 (1999-11-01), Liu et al.
patent: 2005/0145920 (2005-07-01), Chang et al.
patent: 8316347 (1996-11-01), None
Jeong Young-cheon
Kim Ki-chul
Kwon Hyok-ki
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