Nonvolatile memory device and fabricating method thereof

Details Nonvolatile memory device and fabricating method thereof Nonvolatile memory device and fabricating method thereof

2002-10-23

2003-09-02

Booth, Richard (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S593000

Reexamination Certificate

active

06613630

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a nonvolatile memory device and a method for fabricating the device, and more particularly, to a flash memory device having a floating gate and a control gate formed of a metal layer having a downwardly extended portion so as to enhance programming and erasing properties thereof and improve reliability thereof, and a related fabrication method.
2. Description of the Prior Art
As generally known in the art, a nonvolatile memory device is contrasted with a volatile memory device such as a dynamic random access memory (DRAM) and a static random access memory (SRAM). The nonvolatile memory device includes an erasable programmable read only memory (EPROM), an electrically EPROM (EEPROM) and a flash EEPROM.
The nonvolatile memory device has advantages that stored data can be retained even in power off, user can erase the stored data, and programming can be made by user. In particular, the flash EEPROM is a desirable nonvolatile memory device having the advantage of low price in the EPROM and that of convenience in the EEPROM. In the flash EEPROM, the programming operation and the erasing operation are performed by means of hot electron injection and tunneling, respectively.
A conventional nonvolatile memory device will be described in the following.
FIG. 1
schematically shows a conventional flash EEPROM.
Referring to
FIG. 1
, a source region
2
and a drain region
3
are formed with a predetermined distance in a semiconductor substrate
1
. A floating gate
4
and a control gate
5
are formed between the source/drain regions
2
and
3
on the semiconductor substrate
1
. The floating gate
4
is surrounded with an oxide layer
6
, thereby having a floating shape between the semiconductor substrate
1
and the control gate
5
as indicated by the name itself. Both the floating gate
4
and the control gate
5
are formed of a polysilicon layer.
The conventional nonvolatile memory device shown in
FIG. 1
has the deep source region
2
and the shallow drain region
3
. A part of the oxide layer
6
, interposed between a floating gate
4
and a device channel region to be produced near a surface of the substrate
1
, acts as a tunneling oxide layer.
To perform the programming operation, a voltage is applied to both the control gate
5
and the drain region
3
, and also the source region
2
is grounded. When a voltage is applied, parts of electrons in the channel region obtain sufficient energies to jump over an energy barrier of an interface between the channel region and the tunneling oxide layer. The electrons are therefore injected into the tunneling oxide layer, and then gather in the floating gate
4
by means of a voltage applied to the control gate
5
.
The erasing operation is carried out by Fowler-Nordheim tunneling phenomenon appearing when a voltage is applied to both the control gate
5
and the source region
2
. If a low voltage is applied to the control gate
5
and a high voltage to the source region
2
, electrons of the floating gate
4
flow into the source region
2
through the energy barrier.
Unfortunately, the conventional nonvolatile memory device as described above has generally poor programming and erasing efficiency. Furthermore, since the fabrication of the conventional nonvolatile memory device requires processes for forming two polysilicon layers, that is, the floating gate
4
and the control gate
5
, the fabrication method is quite complicate. Additionally, the conventional nonvolatile memory device has a low reliability such as over-erase phenomenon in operation.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a nonvolatile memory device having enhanced programming and erasing properties and improved reliability.
Another object of the present invention is to provide a method for fabricating a nonvolatile memory device in simplified processes.
In order to accomplish the above and other objects, the present invention provides a nonvolatile memory device including two metal layers, which act respectively as a floating gate and a control gate, and each of which has a downwardly extended portion increasing a surface area per fixed unit cell area or alternatively reducing a unit cell area per fixed surface area.
The nonvolatile memory device according to the present invention includes a semiconductor substrate which has an active area defined by an isolation layer, source and drain regions formed at a distance from each other in the active area, and a gate oxide layer formed on the active area. The nonvolatile memory device further includes a polysilicon layer, which is formed on the gate oxide layer between the source and drain regions, and which acts as a floating gate. The device also includes a first oxide layer, which is formed on the gate oxide layer around the polysilicon layer and on a peripheral part of the polysilicon layer. Furthermore, the device includes a first metal layer, which is formed on a part of the first oxide layer, and which is downwardly extended on a central part of the polysilicon layer exposed through the first oxide layer. Therefore, the first metal layer has a downwardly extended portion electrically connected to the polysilicon layer and thus acts as the floating gate. The device further includes a second oxide layer, which is conformally formed on the first metal layer and the first oxide layer, a second metal layer, which is formed on a part of the second oxide layer so as to correspond to the first metal layer. Therefore, the second metal layer acts as a control gate and has a downwardly extended portion. And, the device further includes metal lines, which are respectively connected to the second metal layer and the source and drain regions.
According to another aspect of the present invention, a method for fabricating a nonvolatile memory device is provided. The method includes providing a semiconductor substrate having an active area defined by an isolation layer, forming a gate oxide layer on the active area, and forming a polysilicon layer acting as a floating gate on a part of the gate oxide layer. The method of the invention further includes forming source and drain regions in the active area from both sides of the polysilicon layer, and forming a first oxide layer on the gate oxide layer around the polysilicon layer and on a peripheral part of the polysilicon layer. The method also includes forming a first metal on a part of the first oxide layer and on a central part of the polysilicon layer exposed through the first oxide layer. Therefore, the first metal layer has a downwardly extended portion electrically connected to the polysilicon layer and thus acts as the floating gate. Furthermore, the method includes forming conformally a second oxide layer on the first metal layer and the first oxide layer, and forming a second metal layer acting as a control gate on a part of the second oxide layer so as to correspond to the first metal layer. Therefore, the second metal layer has a downwardly extended portion. And, the method further includes forming metal lines respectively connected to the second metal layer and the source/drain regions.


REFERENCES:
patent: 5923976 (1999-07-01), Kim
patent: 6060741 (2000-05-01), Huang
patent: 6399444 (2002-06-01), Cappelletti
patent: 2003/0045082 (2003-03-01), Eldridge et al.

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