Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-12-04
2007-12-04
Ton, David (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S766000
Reexamination Certificate
active
11321869
ABSTRACT:
A nonvolatile ferroelectric memory device including a failed cell correcting circuit which effectively processes randomly distributed cell data. The nonvolatile ferroelectric memory device checks horizontal parity of a main memory cell array and stores the parity in a horizontal parity check cell array, and checks vertical parity of a main memory cell array and stores the parity in the vertical parity check cell array. Then, code data stored in the horizontal parity check cell array and the vertical parity check cell array are compared to sensing data of the main memory cell to correct an error datum. As a result, a 1 bit failure randomly generated within a predetermined column is corrected.
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Ahn Jin Hong
Kang Hee Bok
Hynix / Semiconductor Inc.
Ton David
Townsend & Townsend & Crew LLP
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