Non-volatile two transistor semiconductor memory cell and...

Details Non-volatile two transistor semiconductor memory cell and... Non-volatile two transistor semiconductor memory cell and...

2006-03-28

2006-03-28

Tran, Mai-Huong (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S257000, C438S258000, C438S263000, C438S266000, C438S201000, C438S211000, C438S594000, C257S239000, C257S261000, C257S314000, C257S323000, C257S315000, C257S316000, C257S317000

Reexamination Certificate

active

07018898

ABSTRACT:
The invention relates to a nonvolatile two-transistor semiconductor memory cell and an associated fabrication method, source and drain regions (2) for a selection transistor (AT) and a memory transistor (ST) being formed in a substrate (1). The memory transistor (ST) has a first insulation layer (3), a charge storage layer (4), a second insulation layer (5) and a memory transistor control layer (6), while the selection transistor (AT) has a first insulation layer (3′) and a selection transistor control layer (4*). By using different materials for the charge storage layer (4) and the selection transistor control layer (4*), it is possible to significantly improve the charge retention properties of the memory cell by adapting the substrate doping with electrical properties remaining the same.

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patent: 6316317 (2001-11-01), Kawata et al.
patent: 6579762 (2003-06-01), Io
patent: 1 102 319 (2001-05-01), None
patent: 03177065 (1991-08-01), None

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