Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1997-02-18
1998-12-22
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Data refresh
36518525, G11C 1300
Patent
active
058525823
ABSTRACT:
A timing apparatus for monitoring when a memory array in a non-volatile storage device needs to be refreshed includes a programmable semiconductor device and detecting means for detecting when the amount of charge on the programmable semiconductor device has diminished to at most a threshold amount. In one embodiment, the programmable semiconductor device is a floating gate transistor programmed by adding charge to the floating gate. The detecting means monitors the I.sub.DS current of the transistor and determines an array refresh time when more than a negligible amount of I.sub.DS current is detected.
REFERENCES:
patent: 3737879 (1973-06-01), Greene et al.
patent: 5347486 (1994-09-01), Urai
Chang Chi
Chang Chung K.
Cleveland Lee E.
Su Jonathan
Tang Yuan
Advanced Micro Devices , Inc.
Fears Terrell W.
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