Static information storage and retrieval – Read/write circuit – Testing
Patent
1989-05-30
1990-09-11
Gossage, Glenn
Static information storage and retrieval
Read/write circuit
Testing
365210, 365185, 36518909, G11C 2900
Patent
active
049568167
ABSTRACT:
This invention provides a non-volatile semiconductor memory having a first node and a second node, the second node having a ground potential. The invention includes a plurality of non-volatile memory cells each having a drain and a threshold potential, the cells, for storing data written into the cells at a predetermined normal writing voltage. A plurality of bit lines, each memory cell being connected to one of the bit lines, transfer data to and from the memory cells. A circuit connected to the bit lines simultaneously tests the memory cells of all the bit lines at the normal writing voltage to detect changes in the threshold potential.
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Atsumi et al., "Fast Programmable 256K Read Only Memory with On-Chip Test Circuits", IEEE Journal of Solid State Circuits, vol. SC-20, No. 1, Feb. 1985, pp. 422-427.
Atsumi Shigeru
Otsuka Nobuaki
Saito Shinji
Tanaka Sumio
Gossage Glenn
Kabushiki Kaisha Toshiba
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