Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-05-02
2001-09-25
Lebentritt, Michael (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S259000, C438S265000, C438S266000
Reexamination Certificate
active
06294427
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a non-volatile semiconductor memory device and, in particular, to a non-volatile semiconductor memory device having a memory element provided with a floating gate and a control gate, as well as to a method of fabricating such a device.
2. Description of Related Art
In a non-volatile semiconductor memory device that has a memory element provided with a floating gate and a control gate, such as flash EEPROM, data is programmed or erased by injecting or removing charge from the floating gate by Fowler-Nordheim (FN) tunneling or channel hot electrons (CHE) through a tunnel oxide film that is formed of a thin oxide film to a thickness of approximately 10 nm on top of a semiconductor substrate.
With a non-volatile semiconductor memory device of this type, the lifetime of the tunnel oxide film varies with the amount of charge that passes therethrough, so that the tunnel oxide film will break down when the quantity of this through charge exceeds a certain value. The quantity of through charge that leads to break-down of the tunnel oxide film is expressed by Q
bd
. Thus the number of times that such a non-volatile semiconductor memory device can be programmed to and erased depends on the magnitude of Q
bd
, so it is desirable to increase the magnitude of Q
bd
in order to increase the number of program/erase cycles.
In general, the intrinsic value of Q
bd
for an oxide film (hereinafter called Q
i
) is determined by the method by which it was formed, however, when a phenomenon occurs such that a charge passes through the tunnel oxide film during the fabrication process after the tunnel oxide film is formed, Q
bd
falls to a value which is less than the intrinsic value Q
I
for the amount of the charge of Q
P
that is the amount of charge that passes through the tunnel oxide film during the fabrication process after the tunnel oxide film is formed. It is therefore necessary to ensure that the semiconductor substrate does not become charged during the fabrication process after the tunnel oxide film is formed, to prevent the above-mentioned phenomenon.
However, various different charging phenomena can occur in practice during processes such as ion implantation and plasma etching process ( as discussed on page 103 of the October 1988 issue of Nikkei Microdevices, for example), so it is difficult to avoid this deterioration in the Q
bd
of the tunnel oxide film. One method of solving this problem is a method designed to prevent charging of the apparatus for fabricating semiconductor devices, but this causes a further problem, that is, it results in increase in the cost of fabricating non-volatile semiconductor memory devices.
The technique disclosed in Japanese Patent Application Laid-Open No. 7-244991 was devised to solve this problem. A cross-sectional view through the structure of a non-volatile semiconductor memory device disclosed in Japanese Patent Application Laid-Open No. 7-244991 is shown in
FIG. 24
, and an equivalent circuit diagram is shown in FIG.
25
.
As shown in
FIG. 24
, field oxide films
156
are provided at intervals on the surface of a P-type semiconductor substrate
154
. A channel stopper region
158
is formed below each of the field oxide films
156
. This non-volatile semiconductor memory device comprises a memory cell portion and a protective circuit portion. Within the memory cell portion, a tunnel oxide film
160
is formed in a region defined by the field oxide layers
156
, on the main surface of the semiconductor substrate
154
. A floating gate
162
is formed on the tunnel oxide film
160
, and a structure known as an ONO film
164
, consisting of a stack of a silicon oxide film, a silicon nitride film, and a silicon oxide film is formed over the floating gate
162
. A control gate
166
is then formed to cover the ONO film
164
. A memory transistor
176
is comprised by the tunnel oxide film
160
, the floating gate
162
, the ONO film
164
, and the control gate
166
.
Within the protective circuit portion, a dielectric film
171
is formed in the region defined by the field oxide layers
156
, of the surfaces of the semiconductor substrate
154
. An N+-type diffusion layer
168
is formed within the semiconductor substrate
154
, below the dielectric film
171
. The control gate
166
extends as far as above the dielectric film
171
, and a MOS capacitor
172
is created by this extension portion of the control gate
166
, the dielectric film
171
, and the N
+
-type diffusion layer
168
. A junction diode
174
is formed between the N
+
-type diffusion layer
168
and the semiconductor substrate
154
.
The MOS capacitor
172
and the junction diode
174
form a protective circuit that prevents deterioration of the tunnel oxide film
160
. In other words, when the control gate
166
is charged during the process of fabricating the semiconductor device, the tunnel oxide film
160
is protected from the charging phenomenon by this protective circuit guiding the charge therethrough.
However, the quality of the dielectric film
171
of the MOS capacitor
172
could be damaged by repeated application of charge to the control gate
166
, so the function thereof as a protective circuit deteriorates. If this continues, the dielectric film
171
could be broken down. In such a case, the protective circuit function would be lost.
In addition, this technique also increases the steps required for fabricating the non-volatile semiconductor memory device, because a capacitor formation step for forming the MOS capacitor
172
is added to the ordinary fabrication process, as a result of forming the dielectric film
171
on the N
+
-type diffusion layer
168
and then extending the control gate
166
as far as thereabove.
SUMMARY OF THE INVENTION
An objective of the present invention is to provide a non-volatile semiconductor memory device having a protective circuit that is applicable to a device wherein memory elements are activated by the use of positive and negative voltages to control gates thereof, without any impairment of the functions thereof even when charges are repeatedly applied.
Another objective of the present invention is to provide a method of fabricating a non-volatile semiconductor memory device having a protective circuit that is applicable to a device wherein memory elements are activated by the use of positive and negative voltages to control gates thereof, without any impairment of the functions thereof even when charges are repeatedly applied.
The present invention relates to a non-volatile semiconductor memory device comprising a semiconductor substrate and a memory element that is provided with a floating gate and a control gate. A circuit formed of a first junction diode and a second junction diode acts as a protective circuit that protects the tunnel insulation film from the charging phenomenon. This protective circuit is connected electrically to the control gate.
A reverse voltage is applied to a first junction diode when a positive voltage is applied to the control gate, and the first junction diode conducts a reverse current therethrough when a positive voltage applied to the control gate is greater than any of a programming voltage, a read voltage, and an erasing voltage that are applied to the control gate.
A second junction diode is connected electrically to the first junction diode and functions in such a manner that a reverse voltage is applied thereto when a negative voltage is applied to the control gate, and the second junction diode conducts a reverse current therethrough when a negative voltage applied to the control gate has an absolute value that is greater than any of a programming voltage, a read voltage, and an erasing voltage that are applied to the control gate. The present invention therefore makes it possible to protect the tunnel insulation film from the charging phenomenon, in a non-volatile semiconductor memory device wherein positive and negative voltages are applied to control gates to activate memory eleme
Furuhata Tomoyuki
Kato Koji
Lebentritt Michael
Oliff & Berridg,e PLC
Seiko Epson Corporation
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