Non-volatile semiconductor memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365154, 365156, G11C 700, G11C 1100

Patent

active

060469412

ABSTRACT:
A semiconductor memory device of the present invention has a write circuit and bit line coupled to the write circuit. Output from the write circuit is sent to corresponding bit line by a transfer gate. During data write term, a write voltage is applied to the bit line when writing a "0" and zero volts is applied to the bit line when writing a "1". The bit line therefore is not left in a floating state when writing either a "0" or a "1". A rise in voltage potential of a bit line due to noise is prevented from occurring, thereby eliminating data writing errors.

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