Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2007-09-04
2010-06-01
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S189120, C365S207000, C365S185230
Reexamination Certificate
active
07729178
ABSTRACT:
The non-volatile semiconductor memory device has a circuit which maintains and holds the potentials of bit lines, and either ones of even-bit lines or odd-bit lines are connected to the circuit. When the bit line potential holding circuit is connected to even-bit lines and a block copy is performed, data is first outputted to the even-bit lines, and after the potential of the even-bit line is determined, the bit line potential holding circuit operates. Then, biasing of the potential of the even-bit lines is carried out by the bit line potential holding circuit, the potentials of the bit lines are maintained and held. At the same time, data is outputted to the odd-bit lines and the potentials of the odd-bit lines are determined. Then, a program voltage is supplied to a selected word line, and data is simultaneously written (programmed) in the memory cells connected to the even-bit lines, and the memory cells connected to the odd-bit lines.
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Futatsuyama Takuya
Kameda Yasushi
Kawai Koichi
Shiga Hitoshi
Takeuchi Ken
Ho Hoai V
Kabushiki Kaisha Toshiba
Lappas Jason
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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