Non-volatile RAM cell with dual high voltage precharge

Details Non-volatile RAM cell with dual high voltage precharge Non-volatile RAM cell with dual high voltage precharge

1986-02-14

1987-11-10

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Precharge

365154, G11C 1140, G11C 900

Patent

active

047062207

ABSTRACT:
A non-volatile memory cell circuit for storing and recalling a digital signal, the memory cell circuit having a store cycle having a repeating series of recurring store cycle sequences; each store cycle sequence being controlled by an HIV Signal and a STORE SIGNAL. The memory cell circuit also has a recall cycle controlled by a MEMORY RESET SIGNAL to preset the state of the memory cell circuit during a first interval, a RECALL OUTPUT CONTROL SIGNAL and a RECALL TRANSFER SIGNAL in a second reset signal interval. The memory cell has a VOLATILE RAM CELL with a flip-flop having first and second nodes at which complementary output signals are provided. The flip-flop also has a SET TERMINAL responsive to a set signal for forcing the flip-flop to assume a predetermined state coupled to the first node and a RESET TERMINAL responsive to the RESET SIGNAL. A NON-VOLATILE RAM element is included having a first capacitor, a second capacitor, and first and second rectifier means responsive to the HIV signal for simultaneously precharging the first and second capacitors. The NON-VOLATILE RAM element also has a charge storage memory responsive to the charge state of the first and second capacitors for storing a state corresponding to the state of the flip-flop into a non-volatile charge storage element.

REFERENCES:
patent: 4103348 (1978-07-01), Fagan
patent: 4132904 (1979-01-01), Harari
patent: 4271487 (1981-06-01), Craycraft
patent: 4354255 (1982-10-01), Stewart
patent: 4363110 (1982-12-01), Kalter et al.
patent: 4499560 (1985-02-01), Brice
patent: 4508980 (1985-04-01), Puar
patent: 4527255 (1985-07-01), Keshtbod

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