Non-volatile memory with programmable capacitance

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S296000, C257S298000, C257S306000, C257S312000, C257SE29345

Reexamination Certificate

active

07977722

ABSTRACT:
Non-volatile memory with programmable capacitance is disclosed. Illustrative data memory units include a substrate including a source region and a drain region. A first insulating layer is over the substrate. A second insulating layer is over the substrate and between the source region and drain region. A solid electrolyte layer is between the first insulating layer and second insulating layer. The solid electrolyte layer has a capacitance that is controllable between at least two states. A first electrode is electrically coupled to a first side of the solid electrolyte layer and is electrically coupled to a voltage source. A second electrode is electrically coupled to a second side of the solid electrolyte layer and is electrically coupled to the voltage source. Multi-bit memory units are also disclosed.

REFERENCES:
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patent: 6894304 (2005-05-01), Moore
patent: 6903361 (2005-06-01), Gilton
patent: 7116577 (2006-10-01), Eitan
patent: 7169635 (2007-01-01), Kozicki
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U.S. Appl. No. 12/123,685, filed May 20, 2008, Xuguang Wang.
Kozicki et al., Nanoscale Memory Elements Based on Solid-State Electrolytes, IEEE Transactions on Nanotechnology, vol. 4, No. 3, May 2005, pp. 331-338.
Eitan et al., NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell, IEEE Electron Device Letters, vol. 21, No. 11, Nov. 2000, pp. 543-545.
Kozicki et al., Mass Transport in Chalcogenide Electrolyte Films-Materials and Applications, Journal of Non-Crystalline Solids 354 (2006), pp. 567-577.

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