Non-volatile memory devices including stepped source regions...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S224000, C257S240000, C257S243000, C257S260000, C257S305000, C257S326000, C257SE29052, C257SE29131

Reexamination Certificate

active

08039889

ABSTRACT:
A non-volatile memory device includes a semiconductor substrate having a first section including a substantially planar first top surface, a second section including a substantially planar second top surface, and a sidewall extending between the first and second top surfaces. The second top surface of the substrate is closer to a bottom surface of the substrate than is the first top surface. A charge storage pattern extends on the first and second top surfaces of the substrate and along the sidewall therebetween. A source region in the first section of the substrate extends from the first top surface into the second section of the substrate and has a stepped portion defined by the sidewall and the second top surface. Related fabrication methods and methods of operation are also discussed.

REFERENCES:
patent: 5566106 (1996-10-01), Bergemont
patent: 5852312 (1998-12-01), Ahn
patent: 5953602 (1999-09-01), Oh et al.
patent: 6362504 (2002-03-01), Simpson
patent: 2008/0061356 (2008-03-01), Kim et al.
patent: 07-115142 (1995-05-01), None
patent: 11-220044 (1999-08-01), None
patent: 2000357753 (2000-12-01), None
patent: 1020040072340 (2004-08-01), None
patent: 1020060067058 (2006-06-01), None
patent: 1020060072688 (2006-06-01), None
patent: 100648287 (2006-11-01), None
English Machine Translation for JP 2000-357753A.
Notice of Allowance for Korean patent application No. 10-2006-0128040; mailed Nov. 21, 2007.

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