Non-volatile memory devices including capping layer contact hole

Details Non-volatile memory devices including capping layer contact hole Non-volatile memory devices including capping layer contact hole

1997-06-05

1998-12-22

Tran, Minh-Loan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257316, 257380, 257538, 257904, H01L 29788

Patent

active

058523111

ABSTRACT:
A non-volatile memory device includes a substrate having memory cell and peripheral circuit regions thereof. A non-volatile memory cell gate on a memory cell region of the substrate includes a floating gate on the substrate, a first insulating gate on the floating gate opposite the substrate, and a control gate on the first insulating layer opposite the floating gate. A resistor layer is provided on a peripheral circuit region of the substrate, and the second insulating layer is provided on the resistor layer opposite the substrate. In addition, a capping layer is provided on the second insulating layer opposite the resistor layer wherein a contact hole is defined by the second insulating layer and the capping layer thereby exposing a portion of the resistor layer. Related methods are also discussed.

REFERENCES:
patent: 4367580 (1983-01-01), Guterman

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