Non-volatile memory device and methods of forming the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S314000, C257S315000, C257S330000, C257S347000, C257SE29129, C257SE21179, C257SE21422, C257SE21680

Reexamination Certificate

active

07465985

ABSTRACT:
A non-volatile memory device and a method of forming the same are provided. The non-volatile memory device may include a cell isolation pattern and a semiconductor pattern sequentially stacked on a predetermined or given region of a semiconductor substrate, a cell gate line on the semiconductor pattern and on a top surface of the semiconductor substrate on one side of the cell isolation pattern, a multi-layered trap insulation layer between the cell gate line and the semiconductor substrate, and the cell gate line and the semiconductor pattern, a first impurity diffusion layer in the semiconductor substrate on both sides of the cell gate line and a second impurity diffusion layer in the semiconductor pattern on both sides of the cell gate line.

REFERENCES:
patent: 6242783 (2001-06-01), Ohmi et al.
patent: 6716686 (2004-04-01), Buynoski et al.
patent: 6995414 (2006-02-01), Yaegashi
patent: 7067872 (2006-06-01), Ichige et al.
patent: 2002/0047157 (2002-04-01), Hidaka et al.
patent: 2004/0084715 (2004-05-01), Takeuchi et al.
patent: 100161737 (1998-08-01), None

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