Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-04-12
2011-04-12
Thai, Luan C (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S216000, C257SE21423, C257SE21409
Reexamination Certificate
active
07923335
ABSTRACT:
A non-volatile memory device having a Polysilicon Oxide Nitride Oxide Semiconductor (SONOS) structure in which a charge trap layer is separated physically in a horizontal direction, and a method of manufacturing the same. The charge trap layer that traps electric charges toward the source and the drain is physically divided. It can fundamentally prevent the charges at both sides from being moved mutually. It is therefore possible to prevent interference between charges at both sides although the cell size is reduced.
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Translation of First Office Action for Chinese Application No. 200610168026.2, dated Nov. 7, 2008.
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Thai Luan C
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