Non-volatile memory device and a method of programming a...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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C365S185030, C365S185220

Reexamination Certificate

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07813188

ABSTRACT:
A method of programming a multi level cell in a non-volatile memory device includes providing different data to main cells and indicator cells. The main cells and indicator cells have different threshold voltages in accordance with the data. A program operation is performed on a main cell and an indicator cell. A first verifying operation is performed based on a first verifying voltage of the main cell and the indicator cell. The program operation and the first verifying operation are performed repeatedly until a threshold voltage of a first cell of the indicator cells is higher than the first verifying voltage. A second verifying operation is performed on the main cell based on a second verifying voltage when the threshold voltage of the first cell is higher than the first verifying voltage.

REFERENCES:
patent: 6903981 (2005-06-01), Futatsuyama et al.
patent: 6970388 (2005-11-01), Takeuchi et al.
patent: 7173862 (2007-02-01), Futatsuyama et al.
patent: 7692970 (2010-04-01), Park et al.
patent: 1020060064856 (2006-06-01), None

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