Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-03-04
2008-03-04
Hoang, Quoc (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S593000, C438S508000, C438S745000, C438S508000, C257S314000, C257SE21680
Reexamination Certificate
active
11183409
ABSTRACT:
A non-volatile memory cell having a floating gate and a method of forming the same. The non-volatile memory cell includes a device isolation layer that is formed in a semiconductor substrate and defines an active region. A floating gate is disposed over the active region and is comprised of a plurality of first conductive patterns and a plurality of second conductive patterns that are alternately stacked. A first insulation layer is disposed between the floating gate and the active region. One of the first conductive pattern and the second conductive pattern protrudes to form concave and convex sidewalls of the floating gate. Therefore, a surface area of the floating gate increases, thereby raising coupling ratio between the floating gate and the control gate electrode. As a result, an operating voltage of the non-volatile memory cell can be reduced.
REFERENCES:
patent: 6469341 (2002-10-01), Sung et al.
patent: 3-34577 (1991-02-01), None
patent: 1997-18737 (1997-04-01), None
Hoang Quoc
Samsung Electronics Co,. Ltd
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