Non-volatile memory cell with non-ohmic selection layer

Details Non-volatile memory cell with non-ohmic selection layer Non-volatile memory cell with non-ohmic selection layer

2011-05-03

2011-05-03

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Resistive

C365S163000, C365S175000

Reexamination Certificate

active

07936585

ABSTRACT:
A non-volatile memory cell and associated method is disclosed that includes a non-ohmic selection layer. In accordance with some embodiments, a non-volatile memory cell consists of a resistive sense element (RSE) coupled to a non-ohmic selection layer. The selection layer is configured to transition from a first resistive state to a second resistive state in response to a current greater than or equal to a predetermined threshold.

REFERENCES:
patent: 5278636 (1994-01-01), Williams
patent: 6121642 (2000-09-01), Newns
patent: 6624463 (2003-09-01), Kim et al.
patent: 6653704 (2003-11-01), Gurney et al.
patent: 6667900 (2003-12-01), Lowrey et al.
patent: 6753561 (2004-06-01), Rinerson et al.
patent: 6781176 (2004-08-01), Ramesh
patent: 6917539 (2005-07-01), Rinerson et al.
patent: 7236394 (2007-06-01), Chen et al.
patent: 2004/0114413 (2004-06-01), Parkinson et al.
patent: 2004/0257878 (2004-12-01), Morikawa et al.
patent: 2006/0073652 (2006-04-01), Pellizzer et al.
patent: 2006/0131554 (2006-06-01), Joung et al.
patent: 2007/0115749 (2007-05-01), Gilbert
patent: 2008/0094873 (2008-04-01), Lai et al.
patent: 2009/0052225 (2009-02-01), Morimoto
patent: 2009/0072246 (2009-03-01), Genrikh et al.
patent: 2010/0078620 (2010-04-01), Xi et al.
patent: 2010/0149856 (2010-06-01), Tang
G. Baek, M. S. Lee, S. Seo, M. J. Lee, D. H. Seo, D.-S. Suh, J. C. Park, S. O. Park, H. S. Kim, I. K. Yoo, U-In Chung and J. T. Moon, “Highly Scalable Non-volatile Resistive Memory using Simple Binary Oxide Driven by Asymmetric Unipolar Voltage Pulses,” IEEE Technical Digest, 2004, pp. 587-590, IEDM.
Yi-Chou Chen, C. F. Chen, C. T. Chen, J. Y. Yu, S. Wu, S. L. Lung, Rich Liu and Chih-Yuan Lu, “An Access-Transistor-Free (0T/1R) Non-Volatile Resistance Random Access Memory (RRAM) Using a Novel Threshold Switching, Self-Rectifying Chalcogenide Device,” IEEE Technical Digest, 2003, pp. 905-908, IEDM.
Choony-Rae Cho, Sungii Cho, Sidorkin Vadim, Ranju Jung and Inkyeong Yoo, “Current-induced metal-insulator transition in VOx thin film prepared by rapid-thermal-annealing,” Science Direct, 2005, pp. 375-379, Elsevier B. V.
N. F. Mott, “Metal-Insulator Transition,” Review of Modern Physics, Oct. 1968, pp. 677-683, vol. 40, No. 4.
G. Stefanovich, A. Pergament and D. Stefanovich, “Electrical switching and Mott transition in VO2,” J. Phys.: Condes. Matter 12, 2000, pp. 8837-8845, IPO Publishing Ltd., UK.
W. W. Zhuang, W. Pan, B. D. Ulrich, J. J. Lee, L. Stecher, A. Burmaster, D. R. Evans, S. T. Hsu, M. Tajri, A Shimaoka, K. Inoue, T. Naka. N. Awaya, K. Sakiyama, Y. Wang, S. Q. Liu, N. J. Wu and A. Ignatiev, “Novell Colossal Magnetoresistive Thin Film Nonvolatile Resistance Random Access Memory (RRAM),” IEEE Technical Digest, 2002, pp. 193-196, IEDM.
Andriy Romanyuk, Roland Steiner, Laurent Marot & Peter Oelhafen, “Temperature-induced metal-semiconductor transition in W-doped VO2 films studied by photoelectron spectroscopy,” Solar Energy Materials and Solar Cells, 2007, pp. 1831-1835, No. 91, Elsevier, Switzerland.

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