Non-volatile memory cell and method of forming the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S250000, C438S251000, C438S252000, C257SE21048, C257SE21190, C257SE21396

Reexamination Certificate

active

11481043

ABSTRACT:
A non-volatile memory cell comprising a transistor and two plane capacitors. In the memory cell, a switching device is disposed on a substrate, a first plane capacitor having a first doped region and a second plane capacitor having a second doped region. The switching device and the first and second plane capacitors share a common polysilicon floating gate configured to retain charge as a result of programming the memory cell. The memory cell is configured to be erased by tunneling between the first doped region and the common polysilicon floating gate without causing junction breakdown within the memory cell. The first and second doped regions are formed in the substrate before forming the common polysilicon floating gate such that the capacitance of the first and second plane capacitors are constant when the memory cell operates within an operating voltage range.

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patent: 6191980 (2001-02-01), Kelley et al.
patent: 6661705 (2003-12-01), McPartland et al.
patent: 2004/0217444 (2004-11-01), Ooms et al.

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