Non-volatile memory and manufacturing method thereof

Details Non-volatile memory and manufacturing method thereof Non-volatile memory and manufacturing method thereof

2006-12-05

2006-12-05

Dang, Trung (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S596000, C257S324000, C257S326000, C257SE29309, C257SE21679

Reexamination Certificate

active

07144777

ABSTRACT:
A non-volatile memory comprising a substrate, a stacked gate structure, a conductive spacer, an oxide
itride/oxide layer, buried doping regions, a control gate and an insulating layer. The stacked gate structure is disposed on the substrate. The stacked gate structure comprises a gate dielectric layer, a select gate and a cap layer. The conductive spacer is disposed on the sidewalls of the stacked gate structure. The oxide
itride/oxide layer is disposed between the conductive spacer and the stacked gate structure and between the conductive spacer and the substrate. The buried doping regions are disposed in the substrate outside the conductive spacer on each side of the stacked gate structure. The control gate is disposed over the stacked gate structure and electrically connected to the conductive spacer. The insulating layer is disposed between the buried doping layer and the control gate.

REFERENCES:
patent: 2004/0155234 (2004-08-01), Ishimaru et al.
patent: 2004/0201059 (2004-10-01), Ding
patent: 2005/0237777 (2005-10-01), Hsieh et al.
patent: 2006/0011967 (2006-01-01), Shone
patent: 2006/0079055 (2006-04-01), Yang

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