Non-destructive interrogation control circuit for a variable thr

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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365184, 365205, 307297, 307350, G11C 1140

Patent

active

040992640

ABSTRACT:
An illustrative embodiment of the invention provides a substantially non-destructive interrogation circuit for a memory cell such as a variable threshold insulated gate field effect memory transistor device whereby the circuit generates a fixed current for interrogation of the memory transistor such that the disturb voltage, the voltage impressed across the insulator of the memory transistor during interrogation, is minimized and is a function of the current and the gain of the memory device and not the threshold of the memory device. Moreover the disturb voltage is readily calculable and is equal for all interrogations and, therefore, enables one to calculate the maximum number of interrogations of a memory cell before the disturb voltage destroys the memory threshold of the memory cell and rewriting of the data therein must be performed. In addition, a sense latch circuit provides means for sensing the memory data of the memory cell without applying an additional disturb potential to the device.

REFERENCES:
patent: 3914620 (1975-10-01), Millhollan et al.
patent: 3919566 (1975-11-01), Millhollan et al.
patent: 4014007 (1977-03-01), Groeger
patent: 4014008 (1977-03-01), Groeger et al.
patent: 4027285 (1977-05-01), Millhollan et al.
patent: 4037218 (1977-07-01), Groeger et al.

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