Static information storage and retrieval – Addressing – Multiple port access
Patent
1995-03-03
1996-07-02
Nelms, David C.
Static information storage and retrieval
Addressing
Multiple port access
365193, 365221, 36523008, 365236, G11C 800
Patent
active
055329705
ABSTRACT:
An apparatus and method for enhancing serial access memory (SAM) performance incorporating a pipeline technique that removes a first bit clock cycle latency. In a video DRAM (VDRAM) read operation, accessed VDRAM data is provided simultaneously to the SAM and to a primary latch. The first bit of the VDRAM data is moved from the primary latch to a secondary output port of the memory apparatus ahead of the second through n.sup.th bits of the SAM data.
REFERENCES:
patent: 4706076 (1987-11-01), Racchini
patent: 4858190 (1989-08-01), Yamaguchi et al.
patent: 5042014 (1991-08-01), Pinkham et al.
Butler Edward
Lundberg Martin B.
Mokashi Pushkar U.
Sartwell Alfred L.
Shah Hemen R.
Nelms David C.
Niranjan F.
Shkurko Eugene I.
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