Nitrogen liner beneath transistor source/drain regions to...

Details Nitrogen liner beneath transistor source/drain regions to... Nitrogen liner beneath transistor source/drain regions to...

1997-06-09

2001-05-01

Chaudhuri, Olik (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S407000, C257S548000, C257S596000

Reexamination Certificate

active

06225151

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the manufacture of semiconductor structures, and more particularly to the formation of semiconductor regions within a transistor.
2. Description of the Related Art
The formation of high performance transistor structures requires the accurate placement of carefully controlled numbers of dopant atoms in and around the source and drain regions of the transistor. Ion implantation has increasingly replaced gaseous a diffusion methods of doping for a number of reasons, including the ability to implant a carefully controlled amount of dopant into an underlying material to a controlled depth within the underlying material.
In most manufacturing flows, however, subsequent heat treatment steps result in sometimes large amounts of dopant diffusion which alters the location of previously-implanted dopant atoms. Such unwanted diffusion, for example, makes the formation of shallow junction regions in the transistor source and drain regions increasingly difficult.
Arsenic has virtually replaced phosphorus as the n-type dopant of choice for implantation of heavily-doped regions, such as source/drain regions, largely because the heavier arsenic atom diffuses less (for a given heat treatment operation) than the lighter phosphorus atom, and consequently implanted profiles are easier to maintain through subsequent heat treatment operations. For p-type regions, boron is frequently used (for silicon semiconductor devices). The boron atom diffuses more readily than arsenic, and consequently p-type implant profiles are typically more difficult to control. This makes the fabrication of high performance CMOS devices increasingly difficult because the shallow junctions needed for source and drain regions are difficult to maintain through subsequent heat treatment operations.
Moreover, lateral diffusion of dopants from the source/drain regions toward the transistor channel region underlying the gate electrode is also of great concern. As complex doping profiles (such as lightly doped drain (LDD) structures) have become commonplace in high performance semiconductor fabrication, maintaining the spacing between heavily doped source/drain regions and the channel region is increasingly important.
SUMMARY OF THE INVENTION
A method of forming an insulated-gate field effect transistor (IGFET) includes introducing a dopant into the semiconductor body to form a first region of a first source/drain for the IGFET, and forming a liner substantially beneath the first region of the first source/drain, to retard subsequent diffusion of dopant comprising the first region of the first source/drain. The first region may include a lightly-doped region and may as well include a heavily-doped region. Moreover, the introducing step may be performed before or after the forming step. The liner may be formed to include, for example, nitrogen or carbon, and may be advantageously formed by ion implantation of a suitable material containing such an element. The liner may be formed on one side (e.g., a drain side) of an IGFET or on both source and drain sides.
The liner may be formed as part of IGFETs of one conductivity type without so forming as part of other IGFETs of opposite conductivity type. For example, a P-channel IGFET which includes a liner may be advantageously combined with an N-channel IGFET without such a liner, to afford more similar behavior of dopant diffusion between the N- and P-channel IGFETs. Alternatively, a P-channel IGFET which includes a liner may also be advantageously combined with an N-channel IGFET having such a liner.
In another embodiment of the present invention, a method of forming an insulated-gate field effect transistor (IGFET) includes introducing a dopant into a semiconductor body to form a source/drain region for the IGFET, and forming a nitrogen liner beneath the source/drain region. The dopant may be introduced either before or after the nitrogen liner is formed, and the nitrogen liner may be formed adjacent to or separated from the source/drain region. The nitrogen liner may be formed to retard vertical diffusion of the dopant and also to retard lateral diffusion as well.
The nitrogen liner may be formed beneath the source drain regions (which may be formed by an implant normal to the top surface of the semiconductor body), and may be formed to laterally extend beneath a gate electrode of the IGFET. Such a lateral extension beneath the gate electrode may be formed by one or more angled nitrogen implants, or by annealing and consequently laterally-diffusing a previously-implanted nitrogen region. The lateral extension of the nitrogen liner, which may extend up to the top surface of the semiconductor body, retards the lateral diffusion of the dopant in a direction parallel to the top surface. Moreover, the nitrogen liner may be formed either before or after the gate electrode is formed.
In one embodiment of the invention suitable for a semiconductor process, a method of forming an insulated-gate field effect transistor (IGFET) includes providing a semiconductor body having a top surface, introducing a dopant into the semiconductor body to form source/drain regions for the IGFET, and forming a nitrogen liner beneath the source/drain regions to retard diffusion of the dopant during a subsequent high temperature step. The dopant may either be introduced before or after the nitrogen liner is formed. The nitrogen liner may include a first segment formed below the source region of the IGFET and spaced apart from a second segment formed below the drain region of the IGFET. Either or both the first and second segments may be aligned to or may partially extend beneath the gate electrode. Alternatively, the nitrogen liner may be formed as a continuous layer beneath the source region, the gate electrode, and the drain region. The portion of the continuous layer beneath the gate electrode may be closer to the top surface than are remaining portions.
In an additional embodiment of the invention, a method of forming a nitrogen liner for an insulated-gate field effect transistor (IGFET) includes providing a semiconductor body having a top surface, implanting nitrogen into the semiconductor body beneath source/drain regions of the IGFET to a first depth below the top surface of the semiconductor body, and introducing a dopant within the source/drain regions of the IGFET at a depth less than the first depth.
In yet an additional embodiment of the invention, a semiconductor IGFET structure includes a semiconductor body having a top surface, source/drain regions including a dopant, and a nitrogen liner disposed below the source/drain regions for retarding diffusion of the dopant during a subsequent heat treatment step. The nitrogen liner may extend beneath the gate electrode, or may be aligned to the gate electrode, on either the source or drain side of the gate electrode.
The nitrogen liner advantageously retards the diffusion of dopants of either conductivity type (either n-type or p-type). The dopant may be chosen from arsenic, phosphorus, boron, BF, or BF
2
. The nitrogen liner may be formed using either a molecular (N
2
) or atomic (N) nitrogen implant. Moreover, such a nitrogen implant may be performed using a single implant, or using two different implants having different energies to widen the nitrogen liner. A widened nitrogen liner may also be formed by using two different implants having similar or identical energies, one being N
2
and the other N.


REFERENCES:
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patent: 5223445 (1993-06-01), Fuse
patent: 5496751 (1996-03-01), Wei et al.
patent: 5514902 (1996-05-01), Kawasaki et al.
patent: 5516707 (1996-05-01), Loh et al.
patent: 0 419 128 A1 (1991-03-01), None
patent: 61-263274 (1986-11-01), None
patent: 03-011731 (1991-01-01), None
patent: 03-038839 (1991-02-01), None
Suppression of Oxidation Enhanced Boron Diffusion in Silicon by Carbon Implantation and Characterization of MOSFETs with Carbon Implanted Channels, Ibrahim Band, Mehmet C. Ozturk, IEEE, Transactions on Electron

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