Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
1999-07-29
2003-02-04
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C375S215000, C375S347000, C375S368000, C327S036000, C327S149000, C370S392000, C714S705000
Reexamination Certificate
active
06516419
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a system employing extended bus connection to extend capabilities by connecting, in parallel, a plurality of independently-operable multimedia multiplexing devices connected to the same network and more particularly to a method of network synchronization for a whole extended system.
2. Description of the Related Art
In a conventional system using extended bus connection to extend capabilities by connecting, in parallel, a plurality of independently-operable multimedia multiplexing devices connected to the same network, as shown in
FIG. 9
, when data is transmitted among devices, each of multiplexing devices is operated in phase synchronization with a network clock and a clock fed by a particular device is used as a clock for transmission among multiplexing devices.
Moreover, in a conventional method for switching a clock, a redundancy configuration is used.
Accordingly, if data transmission is performed by using a clock fed by an arbitrary number N of devices as a clock in an extension bus, N systems of clock transmission lines are required in the extension bus, and elastic memory is necessary to perform data transmission and a migration of a clock among multiplexing devices.
FIG. 9
shows a block diagram showing operations wherein clock signals from N systems are outputted to each of extension buses from a driver circuit
3
of N units of multiplexing devices and one of N systems is selected.
However, as described above, in the system in which each of multiplexing devices is operated in phase synchronization with a network clock, phase synchronization of a clock outputted from each device is well matched, however, because a point of changes in clocks varies depending upon a length of an extension bus cable to be connected or upon positional relation of connected devices, switching of the clock is not easy.
To solve this problem, by providing elastic memory for every clock, switching not the clock but the migrated data is made possible, however, there is still problem in that elastic memory of N systems is required to do this, thus causing large-sized hardware.
SUMMARY OF THE INVENTION
In view of the above, it is an object of the present invention to provide a method of synchronization to allow a whole system to establish synchronization with a network and a method of switching a clock to allow continuous service without instantaneous chopping of data by employing simple and highly-stable hardware configurations.
According to a first aspect of the present invention, there is provided a method of network synchronization for an extended system having a plurality of multiplexing devices connected to the same network in parallel through an extension bus, the method comprising the steps of:
using one of two or more multiplexing devices as a clock master and other remaining multiplexing devices as slave devices wherein the multiplexing device acting as the clock master establishes synchronization with a clock received from the network while the multiplexing devices acting as slave devices establish synchronization with the network by receiving a clock outputted after the clock master has established synchronization with the network, from a clock transmission line of the extension bus, and by regenerating a clock leading the received clock.
In the foregoing, a preferable mode is one that wherein is applied to a system where said multimedia multiplexing device is replaced by a multi-point control device to realize a TV conference among multi-points;
Wherein both a plurality of terminals for TV conference and a plurality of the multi-point control devices independently-operable are connected to the same network in parallel.
According to a second aspect of the present invention, there is provided a method of network synchronization among two or more multiplexing devices constituting an extended system connected to the same network in parallel through an extension bus, the method comprising the steps of:
using one of two or more multiplexing devices as a clock master and other remaining multiplexing devices as slave devices wherein the multiplexing device acting as the clock master establishes synchronization with a clock received from the network, while the multiplexing devices acting as slave devices establish synchronization with other multiplexing devices by receiving a clock outputted after the clock master has established synchronization with the network, from a clock transmission line of the extension bus, and by regenerating a clock leading the received clock in phase.
According to a third aspect of the present invention, there is provided a method of network synchronization for an extended system having a plurality of multiplexing devices connected to the same network in parallel through an extension bus, the method comprising the steps of:
using one of two or more multiplexing devices as a clock master and other remaining multiplexing devices as slave devices wherein the multiplexing device acting as the clock master establishes synchronization with a clock received from the network, while the multiplexing devices acting as slave devices establish synchronization with the network and the multiplexing devices by receiving a clock outputted after the clock master has established synchronization with the network, from a clock transmission line of the extension bus, and by regenerating a clock leading the received clock in phase.
According to a fourth aspect of the present invention, there is a method for switching a clock master in an extended system having a plurality of multiplexing devices connected to the same network in parallel through an extension bus, the method comprising the steps of:
providing the extension bus with clock transmission lines consisting of an active system and a standby system, and with data transmission lines;
establishing synchronization of a clock between all multiplexing devices and the network, and among the multiplexing devices by slave devices' receiving, through the extension bus, a clock with which a clock master is in phase synchronization with a network clock and by regenerating a clock based on the received clock, wherein each of the multiplexing devices comprises a clock regenerating circuit to regenerate a clock leading the received clock in phase based on the clock received from the network if each of said multiplexing device is used as a clock master or based on a clock received from the extension bus if it is used as slave devices, an output circuit to output a clock regenerated when each of said multiplexing device is used as the clock master and timing signal to an active clock transmission line of the extension bus, a control circuit to monitor the slave state of each device and a fault, and a receiving circuit to output a clock fed from either of the clock lines in response to a control signal fed by the control circuit or to output a clock synthesized clocks from two systems obtained by ANDing clocks fed from the active and standby clock transmission lines; and
using one of multiplexing devices to which a role of a clock master is transferred to be a new clock master, wherein, if the control circuit detects that a fault has occurred in the clock master, one of the multiplexing devices to which a role of a clock master is transferred is selected by each control circuit of each multiplexing device, and any of the multiplexing devices decided to be a new clock master outputs regenerated clock to the standby clock transmission line, while other slave devices, using their receiving circuit, temporarily make active clocks from both clock transmission lines, synthesize clocks fed by two systems obtained by ANDing clocks from the active and standby clock transmission lines for outputting, regenerate a clock using the logically synthesized clock, and then stop outputting of a clock to the clock transmission line of the clock master having a fault.
REFERENCES:
patent: 4881243 (1989-11-01), Whitt
patent: 4891599 (1990-01-01), Lauper et al.
patent: 49
Farooq Mohammad O.
Gaffin Jeffrey
Scully Scott Murphy & Presser
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