Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Die bond
Patent
1996-03-29
1999-03-09
Arroyo, Teresa M.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Die bond
257778, 257789, 257790, H01L 2348, H01L 2352, H01L 2329
Patent
active
058805303
ABSTRACT:
An apparatus and method for forming solder interconnection structures that reduce thermo-mechanical stresses at the solder joints of a semiconductor device and its supporting substrate. In one embodiment, the solder interconnection structure of the present invention comprises a semiconductor device and a substrate having a plurality of solder connections extending from the substrate to electrodes or bond pads on the semiconductor device. A multilayer structure is disposed between the semiconductor device and substrate filling the gap formed by the solder connections. The multilayer structure includes a first layer and a second layer, each having a different coefficient of thermal expansion. Thus, in accordance with the present invention, the stress concentration points are moved away from the solder joints of the semiconductor device and substrate to a point located between the first and second layers of the filler structure.
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Inoue Shuji
Kubota Jiro
Kuroda Mashahiro
Mashimoto Yohko
Arroyo Teresa M.
Intel Corporation
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