Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration
Patent
1997-12-19
1999-09-14
Palys, Joseph E.
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
709208, 709209, 712 31, 714 13, G06F 9445, G06F 1500
Patent
active
059516836
ABSTRACT:
One of processors connected effectively to a system is allocated to a master processor and the other remaining processors are allocated to slave processors. Each processor compares the self processor number of a processor number register and the processor number of the other processor of a processor effective register. For example, when the self processor number is smallest as compared with the other processor numbers, it is recognized that the self processor is a master processor. A master initialization diagnosing process after completion of the allocation is monitored by the slave processor. When an abnormality of the master processor is recognized, a degeneration to disconnect the master processor from the system is executed and is again reconstructed by the allocating process of master/slaves. Even when an abnormality occurs in the master processor, the operation in which the system was degenerated can be executed until the minimum construction in which two or more processors normally operate.
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Katsumata Yukihiro
Nakamura Shin-ichiro
Tabata Takeo
Yuuki Kazuhiro
Fujitsu Limited
Mai Rijue
Palys Joseph E.
PFU Limited
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