Multiplex (MUX) circuit having a single selection signal and...

Details Multiplex (MUX) circuit having a single selection signal and... Multiplex (MUX) circuit having a single selection signal and...

2007-10-16

2007-10-16

Chang, Daniel D. (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

C327S408000

Reexamination Certificate

active

10992077

ABSTRACT:
A MUX circuit may include a plurality of inverter pairs for receiving one of a first input signal and a second input signal to generate a plurality of inverter outputs. The circuit may also include a plurality of switches operatively connected to the plurality of inverter pairs and to a single selection signal for selectively transmitting at least one of the inverter outputs representing one of the first and second input signals as a MUX circuit output signal, based on the selection signal. Generating an output signal from the high-speed MUX circuit may include generating the single selection signal therein and transmitting one of the first and second input signal as a MUX circuit output signal, based on the single selection signal.

REFERENCES:
patent: 5376829 (1994-12-01), Rogers et al.
patent: 59-215124 (1984-12-01), None
patent: 5-129910 (1993-05-01), None
patent: 2003-91994 (2003-03-01), None
patent: 97004057 (1997-03-01), None

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