Multiple threshold voltage transistor implemented by a damascene

Details Multiple threshold voltage transistor implemented by a damascene Multiple threshold voltage transistor implemented by a damascene

1998-11-06

2000-09-05

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438259, 438275, 438301, 438303, H01L 21336

Patent

active

061142069

ABSTRACT:
An ultra-large-scale integrated (ULSI) circuit includes MOSFETs which have different threshold voltages and yet have the same channel characteristics. The MOSFETs include gate structures with a polysilicon material. The polysilicon material is implanted with lower concentrations of germanium where lower threshold voltage MOSFETs are required. Over a range of 0-60% concentration of germanium, the threshold voltage can be varied by roughly 240 mV. A damascene process can be utilized to fabricate the MOSFETs.

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