Multiple step methods for forming conformal layers

Details Multiple step methods for forming conformal layers Multiple step methods for forming conformal layers

2000-08-01

2001-08-28

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S256000, C438S396000, C438S399000, C438S627000

Reexamination Certificate

active

06281072

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the formation of layers, e.g., tungsten nitride layers, in the fabrication of semiconductor devices. More particularly, the present invention pertains to the formation of such layers to achieve conformal coverage on features.
BACKGROUND OF THE INVENTION
In the fabrication of integrated circuits, various layers, e.g., conductive layers and insulative layers, are used. For example, during the formation of semiconductor devices, such as dynamic random access memories (DRAMs), static random access memories (SRAMs), microprocessors, etc., insulating layers are used to electrically separate conductive layers such as doped polycrystalline silicon, doped silicon, aluminum, refractory metal silicides, etc. It is often required that the conductive layers be interconnected through holes or openings in the insulating layer. Such holes are commonly referred to as contact holes, i.e., when the hole extends through an insulating layer to an active device area, or vias, i.e., when the hole extends through an insulating layer between two conductive layers.
The profile of an opening is of particular importance such that specific characteristics are achieved when a contact hole or via is provided or filled with a conductive material. For example, many holes are high aspect ratio holes or openings. In many cases, where openings are high aspect ratio openings, it is difficult to form certain materials within the openings. For example, in the formation of tungsten nitride on both the bottom and side walls defining an opening using conventional tungsten nitride formation techniques, poor step coverage results.
Tungsten nitride is a preferably used material for formation of barriers in the fabrication of semiconductor devices to prevent the diffusion of one material to an adjacent material. For example, when aluminum contacts silicon surfaces, spiking can occur, and when aluminum comes into direct contact with tungsten, a highly resistive alloy is formed. Further, for example, copper diffusion in silicon occurs when such materials are in direct contact. Diffusion barriers, e.g., tungsten nitride barriers, are commonly used to prevent such undesirable reactions. Tungsten nitride is preferably used in such diffusion barrier applications as it has low resistivity and is thus suitable for use in conductive interfaces for high speed applications. Further, tungsten nitride is also thermally stable, making it more suitable for high temperature processing which is common in integrated circuit fabrication techniques.
Conductive materials are also used in the formation of storage cell capacitors for use in semiconductor devices, e.g., DRAMs. Storage capacity and size are important characteristics of a storage cell. One way to retain the storage capacity of a device and decrease its size is to increase the dielectric constant of the dielectric layer of the storage cell capacitor. Therefore, high dielectric constant materials are used in such applications interposed between two electrodes. One or more layers of various conductive materials may be used as the electrode material. However, generally, one or more of the layers of conductive materials must have certain barrier properties and oxidation resistance properties, particularly due to the processes used in forming high dielectric constant materials. Tungsten nitride is a material that resists oxidation and provides very good barrier properties as described above. As such, tungsten nitride is advantageously used as an electrode material for a storage cell capacitor.
However, many storage cell capacitors are formed by processes including high aspect ratio openings. For example, in U.S. Pat. No. 5,392,189 to Fazan, et al., entitled “Capacitor Compatible with High Dielectric Constant Materials Having Two Independent Insulative Layers and the Method for Forming Same,” issued Feb. 21, 1995, a storage cell capacitor is provided wherein electrodes are formed of a conductive material within high aspect ratio openings having a bottom surface and side walls. As previously described, conventional tungsten nitride formation processes generally have poor step coverage and, therefore, conventional methods for forming tungsten nitride in high aspect ratio openings for electrodes of storage cell capacitors is inadequate. For example, in conventional PECVD processing, tungsten nitride is deposited with thicknesses greater on bottom surfaces than on side wall surfaces defining high aspect ratio openings.
Various methods for forming tungsten nitride are known and described. However, such methods do not provide the conformal coverage adequate for various applications. Particularly, such conformal coverage is lacking, for example, in applications wherein tungsten nitride is formed relative to high aspect ratio openings, e.g., contact and via openings, certain storage cell capacitor structures, etc.
For example, one method of forming tungsten nitride is with chemical vapor deposition (CVD). Generally, for example, conventional chemical vapor deposition processes react WF
6
, N
2
, and H
2
at a high temperature forming WN
x
and HF. Problems attendant to this process include the detrimental tendency of the fluorine to attack exposed surfaces of the semiconductor wafers on which the tungsten nitride is being formed and problems generally associated with high temperatures.
Another method of forming tungsten nitride is by physical vapor deposition (PVD). Conventional PVD technology involves reactive sputtering from a tungsten target in an atmosphere of gaseous nitrogen with an argon carrier gas. Conventional PVD processes may result in a film deposited on the bottom surface defining a high aspect ratio opening. However, it is inadequate for formation of tungsten nitride on side walls of such openings.
Further, as described in U.S. Pat. No. 5,487,923 to Min et al., entitled “Method for Depositing Tungsten Nitride Thin Films for Formation of Metal Wirings of Silicon Semiconductor Elements,” issued Jan. 30, 1996, a plasma enhanced chemical vapor deposition (PECVD) process for formation of tungsten nitride is described. As described therein, the deposition of the tungsten nitride thin film is carried out using a WF
6
, H
2
, and NH
3
reactant gas mixture. Various parameters for the PECVD process are described. However, such a PECVD process does not provide for adequate conformal and uniform coverage in small high aspect ratio openings. Also, it is known that adducts, such as WN
x
NH
Y
form during reactions containing NH
3
. Such adducts are solid in form and cause particle problems.
Further, various other layers, e.g., insulating layers such as silicon dioxide or silicon nitride, are in many circumstances deposited on features having steps requiring conformal coverage, e.g., capacitor structures. Various conventional methods for depositing such layers do not provide for adequate conformal and uniform coverage for such features in such circumstances. For example, in conventional CVD methods for depositing silicon nitride over stepped features, more silicon nitride may be deposited on sidewalls than on lower surfaces from which such walls extend depending upon the parameters of the CVD process.
SUMMARY OF THE INVENTION
To overcome the problems described above, and others which will be apparent from the detailed description below, a two-step formation process to provide conformal coverage at both the bottom surface and one or more side walls of a opening for various applications, e.g., high aspect ratio contact liners or storage cell capacitor electrode applications, or to provide conformal coverage on any features requiring such coverage, e.g. top electrode of a capacitor, is described. The two-step process provides for conformal step coverage in such varied applications.
A method for forming a conformal layer in the fabrication of integrated circuits according to the present invention includes providing a substrate assembly including at least a generally horizontal first surface and a second surface extending therefrom. A first po

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