Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1999-01-04
2000-03-14
Nelms, David
Static information storage and retrieval
Read/write circuit
Bad bit
36523003, G11C 700
Patent
active
060381795
ABSTRACT:
A Random Access Memory including a redundancy scheme wherein redundant memory elements are organized in a mixture of redundancy patches of various sizes, i.e., various number of word/ bit lines in each patch. The number of lines, e.g., 1, 2, 4 or 8 word or bit lines, in each of the patches is selected as appropriate with many different sized patches existing within the same redundancy reservoir. The size the particular patch selected depends on the size of the replaced defect detected during programming.
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Eustis Steven Michael
Herdey Cheryl Jean
Machat Eric Stephen
Pontius Dale Edward
Thoma Endre Philip
International Business Machines Corp.
Lam David
Nelms David
Walsh Robert A.
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