4. Static information storage and retrieval
  5. Read/write circuit
  6. Bad bit

Steven Michael Eustis

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Diagnosable scan chain

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Memory circuitry with auxiliary word line to obtain...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate

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Multiple repair size redundancy

Static information storage and retrieval – Read/write circuit – Bad bit
Patent

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Profile ID: LFUS-PAI-P-332333

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