Multiple precharging semiconductor memory device

Details Multiple precharging semiconductor memory device Multiple precharging semiconductor memory device

1996-11-27

1998-08-04

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Precharge

365204, 36518909, 36518525, G11C 700, G11C 1606

Patent

active

057904669

ABSTRACT:
The semiconductor memory device of this invention includes a plurality of bit lines for carrying data read out from memory cells and supplying the data to a sense amplifier, the device including: a bias voltage generator for generating a first bias voltage and a second bias voltage which are different from each other; a first precharger for precharging at least one selected bit line to a first precharge voltage obtained based on the first bias voltage generated by the bias voltage generator; and a second precharger for preliminarily precharging each bit line to a second precharge voltage obtained based on the second bias voltage generated by the bias voltage generator.

REFERENCES:
patent: 5058072 (1991-10-01), Kashimura
patent: 5202848 (1993-04-01), Nakagawara
patent: 5309401 (1994-05-01), Suzuki et al.
Bateman, B.L., "Nonvolatile memories" Session 10 Overview, 1989 IEEE International Solid-State Circuit Conference, Digest of Technical Papers, pp. 127-132, 134-141.

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