Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-10-31
2004-06-22
Fahmy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S311000, C438S318000, C438S479000
Reexamination Certificate
active
06753216
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the field of semiconductor fabrication and, more particularly, to the fabrication of a multiple-gate transistor.
2. Description of Related Art
A conventional metal-oxide-semiconductor (MOS) transistor is typically characterized by a structure in which a gate electrode is displaced above the transistor channel region by an intermediate gate dielectric film. The region below the channel may include the bulk substrate or an epitaxial film. The transistor is operated by applying a bias to the gate electrode. The bulk material is likely grounded or biased to a constant voltage. Thus, the conventional transistor may be described as having a single-sided gate since the gate exists on only one side of the channel.
It is theorized that single-sided gate transistors inherently exhibit operational characteristics, including leakage current, drive current, and sub-threshold slope, that are less than ideal. These parameters are particularly critical in low power applications such as wireless technology. It would therefore be desirable to implement a multiple-gate transistor structure and it would be further desirable if the implemented process employed conventional processing materials, fabrication equipment, and processing steps.
SUMMARY OF THE INVENTION
The problem described above is addressed by a semiconductor fabrication process and the resulting transistor structure described herein. A dielectric structure is formed upon a substrate. Silicon is then deposited and processed to form a substantially monocrystalline silicon wall on one or more sidewalls of the dielectric structure. This silicon wall is then further processed to be isolated from the silicon substrate regions. A gate dielectric film can then be formed on multiple surfaces of the silicon wall and a gate electrode film formed over the gate dielectric. The gate electrode film is then patterned followed by conventional source/drain implant processing. Portions of the silicon wall not covered by the gate electrode film may then be contacted to form source/drain contacts. In this manner, the silicon wall forms or serves as a transistor channel region. Because the gate dielectric and gate electrode film are formed over or adjacent multiple faces of the silicon wall, the resulting transistor has the desired multiple-gate structure. Moreover, the multiple-gate transistor thus formed has a substantially monocrystalline channel region.
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Mathew Leo
Nguyen Bich-Yen
Pham Daniel Thanh-Khac
Vandooren Anne
Fahmy Wael
Freescale Semiconductor Inc.
Lally Joseph P.
Pham Hoai
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