Multiple etch-stop layer deposition scheme and materials

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S618000, C438S622000, C257S750000, C257S758000, C257SE21122

Reexamination Certificate

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07151052

ABSTRACT:
Described are methods and structures for mitigating the effects of mechanical stresses placed on the layers of semiconductor devices, and specifically disclosed are methods and structures for mitigating the diminished chemical bonds between etch-stop layers and other semiconductor device layers. The disclosed methods and structures use different structures and/or processes for some of the etch-stop layers in a device.

REFERENCES:
patent: 2001/0045651 (2001-11-01), Saito et al.
patent: 2004/0121085 (2004-06-01), Wang et al.
patent: 2004/0238962 (2004-12-01), Jung et al.

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