Multiple embedded memories and testing components for the same

Details Multiple embedded memories and testing components for the same Multiple embedded memories and testing components for the same

2011-05-31

2011-05-31

Beausoliel, Robert (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S733000, C714S724000, C714S727000

Reexamination Certificate

active

07954017

ABSTRACT:
A method of sharing testing components for multiple embedded memories and the memory system incorporating the same. The memory system includes multiple test controllers, multiple interface devices, a main controller, and a serial interface. The main controller is used for initializing testing of each of the dissimilar memory groups using a serial interface and local test controllers. The memory system results in reduced routing congestion and faster testing of plurality of dissimilar memories.

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