Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2006-01-17
2006-01-17
Zarneke, David A. (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S126000
Reexamination Certificate
active
06987031
ABSTRACT:
A semiconductor device package and method of fabricating the same. The semiconductor device package may include a variety of semiconductor dice, thereby providing a system on a chip solution. The semiconductor dice are attached to connection locations associated with a conductive trace layer such as through flip-chip technology. A plurality of circuit connection elements is also coupled to the conductive trace layer, either directly or through additional, intervening conductive trace layers. An encapsulation layer may be formed over the dice and substrate. Portions of the circuit connection elements remain exposed through the encapsulation layer for connection to external devices. A plurality of conductive bumps may be formed, each conductive bump being disposed atop an exposed portion of a circuit connection element, to facilitate electrical connection with an external device.
REFERENCES:
patent: 5102829 (1992-04-01), Cohn
patent: 5731227 (1998-03-01), Thomas
patent: 6150717 (2000-11-01), Wood et al.
patent: 6194250 (2001-02-01), Melton et al.
patent: 6204562 (2001-03-01), Ho et al.
patent: 6228687 (2001-05-01), Akram et al.
patent: 6236109 (2001-05-01), Hsuan et al.
patent: 6239367 (2001-05-01), Hsuan et al.
patent: 6268648 (2001-07-01), Fukutomi et al.
patent: 6368896 (2002-04-01), Farnworth et al.
patent: 6765299 (2004-07-01), Takahashi et al.
patent: 6815254 (2004-11-01), Mistry et al.
patent: 6847109 (2005-01-01), Shim
patent: 2002/0027257 (2002-03-01), Kinsman et al.
patent: 2002/0164840 (2002-11-01), Lu et al.
patent: 2004/0058472 (2004-03-01), Shim
Boon Suan Jeung
Chia Yong Poo
Chua Swee Kwang
Eng Meow Koon
Huang Suangwu
Micro)n Technology, Inc.
TraskBritt
Zarneke David A.
LandOfFree
Multiple chip semiconductor package and method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multiple chip semiconductor package and method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiple chip semiconductor package and method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3545241