Multiple bit dynamic random-access memory

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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365193, G11C 1300

Patent

active

045478678

ABSTRACT:
A dynamic MOS random-access memory is described which includes a circuit for permitting checking of the on chip refresh counter. The memory also includes a refresh generator, the frequency of which automatically varies to compensate for temperature variations. Other innovations include an arbitration circuit, a hidden refresh function and unique accessing of redundant lines.

REFERENCES:
patent: 3798616 (1974-03-01), Spence

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