Multidispatch CPU integrated circuit having virtualized and...

Details Multidispatch CPU integrated circuit having virtualized and... Multidispatch CPU integrated circuit having virtualized and...

2005-05-17

2005-05-17

Coleman, Eric (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction issuing

Simultaneous issuance of multiple instructions

C712S023000

Reexamination Certificate

active

06895497

ABSTRACT:
A multiple dispatch processor has several instruction fetch units, each for providing a stream of instructions to an instruction decode and dispatch unit. The processor also has an resource allocation unit, and multiple resources such as combined integer and address execution pipelines and floating point execution pipelines. Each instruction decode and dispatch unit requests resources needed to perform an instruction of the resource allocation unit, which arbitrates among the multiple instruction decode and dispatch units.

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patent: 5944811 (1999-08-01), Motomura
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patent: 6349381 (2002-02-01), Tremblay
patent: 6742111 (2004-05-01), Soni
patent: 0644482 (1994-09-01), None
patent: WO 0104750 (2001-01-01), None

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