Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-01-04
2005-01-04
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S117000, C711S118000, C365S049130, C365S154000, C365S205000, C365S230010, C365S230030, C327S050000, C327S051000, C327S057000
Reexamination Certificate
active
06839807
ABSTRACT:
A multi-way set associative cache memory includes a set selection signal operating a sense amplifier. In reading data stored in a set, a set selection signal enables the sense amplifier to select one of sets while plural sets are active by a row address. The simplified structure of the present cache memory reduces power consumption by the rate of 1/N (N is the number of sets).
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Kim Jin-Sung
Kwack Jin-Ho
Kwak Jong-Taek
Lee Sun-Min
Kim Matthew
Li Zhuo H.
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
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