Multi-step process for patterning a metal gate electrode

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S734000, C257SE21176, C257SE21229

Reexamination Certificate

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07422969

ABSTRACT:
The present invention provides a method for patterning a metal gate electrode and a method for manufacturing an integrated circuit including the same. The method for patterning the metal gate electrode, among other steps, includes forming a metal gate electrode layer (220) over a gate dielectric layer (210) located on a substrate (110), and patterning the gate electrode layer (220) using a combination of a dry etch process (410) and a wet etch process (510).

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Stanley Wolf, Silicon Processing for the VLSI Era, 1986, Lattice Press, vol. II, pp. 439-441.

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