Multi-step method for etching strain gate recesses

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S714000, C438S723000

Reexamination Certificate

active

11395921

ABSTRACT:
Methods of performing controllable lateral etches into the silicon layer using a plasma-enhanced etch-deposit-etch sequence are disclosed. The first etch step etches into the silicon layer. The deposition step passivates horizontal surfaces, including the bottom of the etched feature. The second etch step increases the lateral undercut, resulting in a low V:L ratio silicon layer etch.

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patent: 2005/0148147 (2005-07-01), Keating et al.
patent: 2006/0131665 (2006-06-01), Murthy et al.

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