Multi-process support in a shared register

Details Multi-process support in a shared register Multi-process support in a shared register

2011-01-18

2011-01-18

Choe, Yong (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S117000, C711S147000, C718S102000

Reexamination Certificate

active

07873795

ABSTRACT:
A method of, shared register system and system for controlling access to a register are described. The shared register stores a plurality of bits including control and data bits. An access signal and a combined signal including a control portion and a data portion are received and the data portion of the combined signal is written to one or more data bits of the shared register corresponding to the control portion of the combined signal. A shared register system for controlling access to portions of a shared register includes a register having storage for bits and a register access control configured to receive an access signal and a combined signal. The register access control is operatively connected with the register to control write access to the register based on the access signal and the control portion of the combined signal.

REFERENCES:
patent: 3740723 (1973-06-01), Beausoleil et al.
patent: 6182108 (2001-01-01), Williams et al.
patent: 2001/0021951 (2001-09-01), Kimura et al.
patent: 2003/0188073 (2003-10-01), Zatorski
patent: 2003/0212859 (2003-11-01), Ellis et al.
patent: 2006/0004988 (2006-01-01), Jordan

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