4. Electrical computers and digital processing systems: memory
  5. Storage accessing and control
  6. Hierarchical memories

Craig VanZante

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Method for automatic adjustment of timing of double data...

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate

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Multi-process support in a shared register

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate

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Network loop detection using known static addresses

Multiplex communications – Network configuration determination – Using a particular learning algorithm or technique
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Profile ID: LFUS-PAI-P-2207547

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